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high efficiency, ground-referenced class-g headphone amplifier data sheet SSM2932 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2012 analog devices, inc. all rights reserved. features ground-referenced class-g output stage very high efficiency for portable applications 1.7 ma typical quiescent current 50 mw per channel into 16 load (with 3.3 v supply) 98 db signal-to-noise ratio (snr), a-weighted 90 db power supply rejection ratio at 217 hz 2.5 v to 3.6 v supply range selectable gain: 0 db or 6 db high-z output mode for sharing of output jack 1 a shutdown current short-circuit protection pop-and-click reduction circuitry 8 kv esd protection on output terminals 16- ball, 0.4 mm pitch wlcsp (1.64 mm 1.64 mm) ?40c to +85c operating temperature range applications cell phones smartphones/multimedia phones digital cameras portable media players phone accessories pdas general description the SSM2932 is a stereo headphone amplifier capable of delivering 50 mw of continuous output power per channel into 16 single-ended loads at the 1% thd + n threshold. the stereo headphone drivers are high efficiency, true ground- referenced class-g technology. the SSM2932 incorporates a gain control pin that selects a gain of 0 db or 6 db. the ground-referenced output scheme eliminates the need for large dc blocking capacitors, reducing system cost and board area. the class-g amplifier is fine-tuned to maximize battery life, a critical task in portable applications. the device maximizes battery life by modulating the amplifier power supply rail to match the output demand without consuming excessive supply current, thus reducing power dissipation during typical audio playback. the SSM2932 is specified over the industrial temperature range of ?40 c to +85 c. it has output short-circuit protection as well as esd protection to 8 kv (human body model). the SSM2932 is available in a 16-ball, 1.64 mm 1.64 mm wafer level chip scale package (wlcsp). functional block diagram 10360-001 por gain power management pga pga pop/ click current limit SSM2932 outl sgnd outr inl+ inl? inr+ inr? pgnd pvdd cpvss cpvdd cf2 cf1 gain hi-z sd figure 1.
SSM2932 data sheet rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? digital input specifications......................................................... 4 ? absolute maximum ratings............................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution.................................................................................. 5 ? pin configuration and function descriptions............................. 6 ? typical performance characteristics ..............................................7 ? theory of operation ...................................................................... 12 ? amplifier gain............................................................................ 12 ? amplifier shutdown................................................................... 12 ? high output impedance ........................................................... 12 ? ground sense.............................................................................. 12 ? layout .......................................................................................... 12 ? typical application circuit ........................................................... 14 ? outline dimensions ....................................................................... 15 ? ordering guide .......................................................................... 15 ? revision history 2/12revision 0: initial version
data sheet SSM2932 rev. 0 | page 3 of 16 specifications pvdd = 3.0 v, c cf = 1 f, c cpvdd = c cpvss = 2.2 f, r l = 32 , t a = 25c, unless otherwise noted. table 1. parameter symbol test conditions/comments min typ max unit device characteristics voltage gain a v input voltage = 100 mv rms gain pin high 6 db gain pin low 0 db output power p o f = 1 khz, thd = 1% r l = 16 , one channel 85 mw r l = 32 , one channel 50 mw r l = 16 , stereo 40 mw r l = 32 , stereo 45 mw total harmonic distortion plus noise thd + n p o = 10 mw per channel 0.01 % gain matching a v 1 % frequency range ripple within 0.5 db 20 20,000 hz differential input impedance z in 12 18 34.5 k c h a r g e p u m p oscillator frequency f osc0 idle mode, v out = 0 v 54 khz f osc1 active mode 550 khz headphone amplifier supply positive rail v cpvdd efficiency mode: v out < 0.2 v rms pvdd/2 v high power mode: v out > 0.2 v rms 2.2 v negative rail v cpvss efficiency mode: v out < 0.2 v rms ?pvdd/2 v high power mode: v out > 0.2 v rms ?2.2 v output voltage threshold v th1 transition from efficiency mode to high power mode 285 mv v th2 transition from high power mode to efficiency mode 375 mv charge pump transition time t release charge pump transition from high power mode to efficiency mode 0.8 ms t attack charge pump transition from efficiency mode to high power mode 10 s noise performance output voltage noise e n bw = 20 khz, a-weighted, gain = 0 db 12 v rms signal-to-noise ratio snr a-weighted 98 db pop-and-click noise v cp ?60 dbv channel separation x talk single-ended, 1 v rms, p o = 31 mw 86 db output characteristics output offset voltage |v os | 0.25 mv capacitive output drive c load 150 pf slew rate sr 1.25 v/s startup and shutdown measured from sd rising edge start-up time t su 20 ms shutdown time t sd 36 s power supply 0c < t a < 70c supply voltage range pvdd guaranteed from psrr test 2.5 3.6 v quiescent current i dd r l = 32 + 200 pf; gain = 0 db, pvdd = 3 v 1.7 ma shutdown current i sd sd = gnd 1 a power supply rejection ratio psrr v ripple = 100 mv peak , g a i n = 0 d b f = 217 hz 90 db f = 1 khz 84 db f = 10 khz 62 db
SSM2932 data sheet rev. 0 | page 4 of 16 digital input specifications table 2. parameter symbol test conditions/comments min typ max unit input voltage high v ih 1.2 v input voltage low v il 0.5 v input leakage current i in v in = 0 v or v dd 1 a input capacitance c in 5 pf
data sheet SSM2932 rev. 0 | page 5 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. parameter rating analog supply voltage (pvdd) 3.75 v input voltage 1.8 v peak output esd, human body model 8 kv storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +165c lead temperature (soldering, 60 sec) 300c table 4. thermal resistance package type ja unit 16-ball, 1.64 mm 1.64 mm wlcsp 66 c/w esd caution stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
SSM2932 data sheet rev. 0 | page 6 of 16 pin configuration and fu nction descriptions top view (ball side down) not to scale 10360-002 1 a b c d 234 ball a 1 indicator sd pgnd cf2 hi-z outl cpvdd sgnd outr inl? inl+ inr+ inr? pvdd cf1 cpvss gain figure 2. pin configuration table 5. pin function descriptions pin no. nemonic description a1 sd shutdown control b1 pgnd power ground c1 cf2 charge pump flying capacitor, terminal 2 d1 hi-z output impedance select a2 pvdd power supply b2 cf1 charge pump flying capacitor, terminal 1 c2 cpvss charge pump negative supply d2 gain gain control a3 outl left channel headphone output b3 cpvdd charge pump positive supply c3 sgnd headphone sense ground d3 outr right channel headphone output a4 inl? left channel inverting input b4 inl+ left channel noninverting input c4 inr+ right channel noninverting input d4 inr? right channel inverting input
data sheet SSM2932 rev. 0 | page 7 of 16 typical performance characteristics 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-004 in phase out of phase 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-003 in phase out of phase figure 3. thd + n vs. output power, pvdd = 3.6 v, r l = 32 figure 6. thd + n vs. output power, pvdd = 3.6 v, r l = 16 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-029 in phase out of phase 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-030 in phase out of phase figure 4. thd + n vs. output power, pvdd = 3.0 v, r l = 32 figure 7. thd + n vs. output power, pvdd = 3.0 v, r l = 16 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-006 in phase out of phase 100 10 1 0.1 0.01 0.001 0.1 1 10 100 output power per channel (mw) thd + n (%) 10360-005 in phase out of phase figure 5. thd + n vs. output power, pvdd = 2.5 v, r l = 32 figure 8. thd + n vs. output power, pvdd = 2.5 v, r l = 16
SSM2932 data sheet rev. 0 | page 8 of 16 1 0.1 0.01 0.001 10 100 1k 10k 100k frequency (hz) thd + n (%) 10360-007 p o = 5mw p o = 10mw p o = 20mw figure 9. thd + n vs. frequency, pvdd = 3.6 v, r l = 32 1 0.1 0.01 0.001 10 100 1k 10k 100k frequency (hz) thd + n (%) 10360-009 p o = 5mw p o = 10mw p o = 20mw figure 10. thd + n vs. frequency, pvdd = 2.5 v, r l = 32 ? 50 ?80 ?70 ?60 ?90 ?100 10 100 1k 10k 100k frequency (hz) psrr (db) 10360-011 left channel right channel figure 11. psrr vs. frequency, pvdd = 3.0 v, r l = 32 1 0.1 0.01 0.001 10 100 1k 10k 100k frequency (hz) thd + n (%) 10360-008 p o = 5mw p o = 10mw p o = 20mw figure 12. thd + n vs. frequency, pvdd = 3.6 v, r l = 16 1 0.1 0.01 0.001 10 100 1k 10k 100k frequency (hz) thd + n (%) 10360-010 p o = 5mw p o = 10mw p o = 20mw figure 13. thd + n vs. frequency, pvdd = 2.5 v, r l = 16 ? 50 ?80 ?70 ?60 ?90 ?100 10 100 1k 10k 100k frequency (hz) psrr (db) 10360-012 left channel right channel figure 14. psrr vs. frequency, pvdd = 3.0 v, r l = 16
data sheet SSM2932 rev. 0 | page 9 of 16 170 150 130 110 90 70 50 2.5 2.7 2.9 3.1 3.3 3.5 supply voltage (v) total output power (mw) 10360-013 thd + n = 1% thd + n = 10% figure 15. output powe r vs. supply voltage, r l = 32 0.2 0.1 0 ?0.1 ?0.2 10 100 1k 10k 100k frequency (hz) gain (db) 10360-015 figure 16. frequency response, pvdd = 3.0 v ? 75 ?80 ?85 ?90 ?95 ?100 ?105 ?110 ?115 10 100 1k 10k 100k frequency (hz) channel separation (db) 10360-017 right to left left to right figure 17. channel separation vs. frequency, pvdd = 3.0 v, r l = 32 210 190 170 150 130 90 110 30 50 70 2.5 2.7 2.9 3.1 3.3 3.5 supply voltage (v) total output power (mw) 10360-014 thd + n = 1% thd + n = 10% figure 18. output powe r vs. supply voltage, r l = 16 100k 1k 10k 100 100 1k 10k 100k 1m 10m frequency (hz) impedance ( ? ) 10360-016 figure 19. high-z mode outp ut impedance vs. frequency ? 55 ?60 ?65 ?70 ?75 ?80 ?85 ?90 ?95 10 100 1k 10k 100k frequency (hz) channel separation (db) 10360-018 right to left left to right figure 20. channel separation vs. frequency, pvdd = 3.0 v, r l = 16
SSM2932 data sheet rev. 0 | page 10 of 16 0 0 250 200 150 50 100 0 02 04 06 08 01 total output power (mw) power consumption (mw) 10360-020 figure 21. power consumption vs. output power, pvdd = 3.0 v, r l = 32 140 120 100 80 40 60 20 0 02 04 06 08 01 total output power (mw) power dissipation (mw) 10360-021 0 0 figure 22. power dissipation vs. output power, pvdd = 3.0 v, r l = 32 100 10 1 10 100 1k load resistance ( ? ) output power per channel (mw) 10360-024 pvdd = 2.5v pvdd = 3.3v figure 23. maximum output power per channel vs. load resistance, flying capacitor = 1 f, thd + n = 1% 350 300 250 200 100 150 50 0 02 04 06 08 01 total output power (mw) power consumption (mw) 10360-022 0 0 figure 24. power consumption vs. output power, pvdd = 3.0 v, r l = 16 250 200 150 50 100 0 02 04 06 08 01 total output power (mw) power dissipation (mw) 10360-023 0 0 figure 25. power dissipation vs. output power, pvdd = 3.0 v, r l = 16 1.72 1.70 1.68 1.66 1.64 1.62 1.60 2.5 2.7 2.9 3.1 3.3 3.5 supply voltage (v) quiescent current (ma) 10360-019 r l = 32 ? r l = 16 ? figure 26. quiescent current vs. supply voltage
data sheet SSM2932 rev. 0 | page 11 of 16 10360-026 500mv/ 1.00v/ 20.00ms 5.00ms 1.75v trig?d? 1 2 3 4 2 t 1, 2 10360-027 1.00v/ 1.00v/ 1.520ms 2.000ms 1.01v trig?d? 1 2 3 4 1 t 1, 2 figure 27. start-up waveform vs. time figure 29. shutdown waveform vs. time 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 ?160 ?180 10 100 1k 10k 100k frequency (hz) output (dbv) 10360-028 figure 28. output spectrum vs. frequency, pvdd = 3.0 v, r l = 32
SSM2932 data sheet rev. 0 | page 12 of 16 theory of operation the SSM2932 provides a high efficiency class-g stereo head- phone output that is true ground-referenced; therefore, no external coupling capacitors are required for connection to the headphones. the headphones can be connected directly to the headphone output pins, outl (b all a3) and outr (ball d3). the headphone amplifier uses the supply provided at pvdd (ball a2). this supply voltage must be decoupled with a 1 f electrolytic capacitor, along with a 100 nf ceramic x7r capacitor. the headphone amplifier uses class-g architecture and generates the required power supplies with a built-in charge pump that uses a flying capacitor connected across cf1 (ball b2) and cf2 (ball c1). the charge pump switching frequency is approximately 54 khz in the idle state with no input signal detected and 550 khz when a signal is present. the generated supply voltages are available at cpvdd (ball b3, positive rail) an d cpvss (ball c2, negative rail). the supply voltage of the headphone amplifier depends on the input signal to the amplifier. for lower input signal levels, the positive and negative rails are lowered, typically to pvdd/2. as the signal level increases, cpvdd and cpvss are raised to 2.2 v. this rail switching allows the amplifier to achieve higher efficiency. in most typical usage conditions, the amplifier works on the lower cpvdd and cpvss voltages (pvdd/2), thereby consuming less power. in addition, because the amplifier generates the positive and negative rails, the output amplifier is true ground-referenced, thereby eliminating the need for large coupling capacitors to drive the load. for best audio performance, it is recommended that 2.2 f, x7r ceramic decoupling capacitors be used for cpvdd and cpvss. these capacitors serve as a reservoir for the headphone amplifier. the headphone amplifier has built-in short-circuit protection and, therefore, shuts down in the event of a short circuit on the headphone outputs. the amplifier is designed to drive headphones with a mini- mum impedance of 16 . capacitive loads of up to 150 pf are supported. amplifier gain the SSM2932 amplifier gain can be set to either 0 db or 6 db by applying the appropriate logic level to the gain pin (see table 6 ). table 6. amplifier gain and gain pin logic levels amplifier gain gain pin logic level 0 db low (0.5 v) 6 db high (1.2 v) amplifier shutdown shutdown of the SSM2932 amplifier is controlled by the sd pin. if a logic low is applied to this pin, the amplifier becomes inactive and draws only minimal current from the supply. table 7. amplifier shutdown amplifier state sd pin logic level shutdown low (0.5 v) power-on high (1.2 v) high output impedance the SSM2932 has a hi-z control pin that mutes the amplifier and sets the output to a high impedance. if both hi-z and sd are set high, the amplifier remains in a high impedance state. this feature allows the headphone output jack to be shared for other functions such as video output or data transmission. ground sense sgnd (ball c3) is provided for sensing the dc potential at the headphone jack. it is recommended that sgnd be connected directly to the ground pin of the headphone jack to ensure the lowest dc offset at the amplifier output and to eliminate pop-and- click noises when the amplifier is turned on or off. in addition, connecting the sgnd ball directly to the ground pin of the head- phone jack helps to reduce crosstalk between the left and right channel outputs. a dc path between the sgnd pin and the system ground must also be provided. layout care must be taken to lay out pcb traces and wires properly between the amplifier, load, and power supply. a good practice is to use short, wide pcb tracks to decrease voltage drops and minimize inductance. ensure that track widths are at least 200 mil per inch of track length for lowest dcr, and use at least 1 oz or 2 oz copper thickness to minimize resistance. a poor layout increases voltage drops, consequently affecting efficiency. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. proper grounding guidelines help to improve audio perfor- mance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. the pcb traces that connect the output pins to the load, as well as the pcb traces to the supply pins, should be as wide as possible to maintain the minimum trace resistances. it is also recommended that a large ground plane be used for minimum impedances. the sgnd pin should be connected directly to the ground pin of the headphone jack.
data sheet SSM2932 rev. 0 | page 13 of 16 in addition, good pcb layout isolates critical analog paths from sources of high interference. high frequency circuits (analog and digital) should be separated from low frequency circuits. properly designed multilayer pcbs can reduce emi emissions and increase immunity to the rf field by a factor of 10 or more compared with double-sided boards. a multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted by signal crossover. if the system has separate analog and digital ground and power planes, the analog ground plane should be directly beneath the analog power plane, and, similarly, the digital ground plane should be directly beneath the digital power plane. there should be no overlap between analog and digital ground planes or between analog and digital power planes.
SSM2932 data sheet rev. 0 | page 14 of 16 typical application circuit 10360-031 por gain power management phone jack pga pga outl sgnd outr inl+ 1f 1f 2.2f 2.2f inl? inr+ inr? pgnd pvdd cpvss cpvdd cf2 cf1 gain hi-z sd 100nf 0.1f 0.1f 0.1f 0.1f pop/ click current limit SSM2932 figure 30. application circuit (differential input configuration)
data sheet SSM2932 rev. 0 | page 15 of 16 outline dimensions 02-03-2012-a a b c d 0.560 0.500 0.440 side view 0.230 0.200 0.170 0.300 0.260 0.220 coplanarity 0.05 seating plane 12 3 4 bottom view (ball side up) top view (ball side down) ball a1 identifier 0.40 ref 1.20 ref 1.680 1.640 sq 1.600 figure 31. 16-ball wafer level chip scale package [wlcsp] 1.6 mm 1.6 mm body (cb-16-11) dimensions shown in millimeters ordering guide model 1 temperature range package description package option SSM2932acbz-rl ?40c to +85c 16-ball wafer level chip scale package [wlcsp] cb-16-11 SSM2932acbz-r7 ?40c to +85c 16-ball wafer level chip scale package [wlcsp] cb-16-11 eval-SSM2932z evaluation board 1 z = rohs compliant part.
SSM2932 data sheet rev. 0 | page 16 of 16 notes ?2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10360-0-2/12(0)

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